[PATCH] D107290: [PoC][RISCV] Add support for the vscale_range attribute

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 18 09:20:15 PDT 2021


frasercrmck updated this revision to Diff 367232.
frasercrmck added a comment.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

update usage in vein of AArch64:

- use vscale_range attribute to determine RVV vector bits min/max values
- if no attribute is present, use existing backend flags
- sanitize and pass RVV vector bits from RISCVTargetMachine through to RISCVSubtarget
- RISCVSubtarget just stores and reports


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107290/new/

https://reviews.llvm.org/D107290

Files:
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Basic/Targets/RISCV.h
  clang/test/CodeGen/riscv-vscale-range.c
  llvm/lib/Target/RISCV/RISCVSubtarget.cpp
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp

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