[PATCH] D108292: [Analysis][AArch64] Make fixed-width ordered reductions slightly more expensive

[Dave Green via Phabricator via llvm-commits]

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Yeah, this sounds sensible to me. We still vectorize when there starts to be a clear advantage of using other vector operations.
Looks good to me. Thanks.



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Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp:2005-2007
+      // Add on extra cost to reflect the impact on scheduling, since all the
+      // fadds end up being back-to-back. We still end up vectorizing for more
+      // computationally intensive loops.
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I don't know if we need to talk about this in terms of scheduling exactly - that will be very dependent on the cpu used. Perhaps just describe it in terms of "extra overheads on some cpus"


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