[PATCH] D108091: [AggressiveInstCombine] Add shift left instruction to `TruncInstCombine` DAG

Bjorn Pettersson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 18 01:30:07 PDT 2021


bjope added a comment.

In D108091#2951392 <https://reviews.llvm.org/D108091#2951392>, @anton-afanasyev wrote:

> In D108091#2950930 <https://reviews.llvm.org/D108091#2950930>, @bjope wrote:
>
>> Seen some failures and I'm suspecting this commit.
>>
>> For input like this:
>>
>>   define i32 @foo(i32 %call62, i16 %call63) {
>>     %conv64142 = zext i32 %call62 to i64
>>     %conv65 = sext i16 %call63 to i64
>>     %sh_prom66 = and i64 %conv65, 4294967295
>>     %shl67 = shl i64 %conv64142, %sh_prom66
>>     %conv68 = trunc i64 %shl67 to i32
>>     ret i32 %conv68
>>   }
>>
>> we now get the following after aggressive instcombine
>>
>>   define i32 @foo(i32 %call62, i16 %call63) {
>>     %conv65 = sext i16 %call63 to i32
>>     %sh_prom66 = and i32 %conv65, -1
>>     %shl67 = shl i32 %call62, %sh_prom66
>>     ret i32 %shl67
>>   }
>>
>> which is more poisonous according to https://alive2.llvm.org/ce/z/88tNrs
>>
>> In my original test case %call63 is 32, so we shift leftby 32, which is ok when shifting the i64 but not after having rewritten into a 32-bit shift.
>
> Thanks @bjope, it was overflow of `unsigned = uint64_t` assignment, fixed it here: https://reviews.llvm.org/rG803270c0c691

I've cherry-picked you fix and the test case that failed now pass again. Thanks!


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  https://reviews.llvm.org/D108091/new/

https://reviews.llvm.org/D108091



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