[PATCH] D108269: [X86] [AMX] Fix the test case failure caused by D107544.

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke created this revision.
Herald added subscribers: pengfei, hiraditya.
LuoYuanke requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

The issue can be duplicated when EXPENSIVE_CHECKS is specified for llvm
build. Thank Simon report this issue at
https://bugs.llvm.org/show_bug.cgi?id=51513. We need return correct
value for the changed IR.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108269

Files:
  llvm/lib/Target/X86/X86LowerAMXType.cpp


Index: llvm/lib/Target/X86/X86LowerAMXType.cpp
===================================================================
--- llvm/lib/Target/X86/X86LowerAMXType.cpp
+++ llvm/lib/Target/X86/X86LowerAMXType.cpp
@@ -175,25 +175,8 @@
   void combineLoadBitcast(LoadInst *LD, BitCastInst *Bitcast);
   void combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST);
   bool transformBitcast(BitCastInst *Bitcast);
-  Value *getRowFromCol(Instruction *II, Value *V, unsigned Granularity);
 };
 
-Value *X86LowerAMXType::getRowFromCol(Instruction *II, Value *V,
-                                      unsigned Granularity) {
-  if (Col2Row.count(V))
-    return Col2Row[V];
-  IRBuilder<> Builder(&*II->getParent()->getFirstInsertionPt());
-  if (auto *I = dyn_cast<Instruction>(V)) {
-    BasicBlock::iterator Iter = I->getIterator();
-    ++Iter;
-    Builder.SetInsertPoint(&*Iter);
-  }
-  ConstantInt *Gran = Builder.getInt16(Granularity);
-  Value *RealRow = Builder.CreateUDiv(V, Gran);
-  Col2Row[V] = RealRow;
-  return RealRow;
-}
-
 // %src = load <256 x i32>, <256 x i32>* %addr, align 64
 // %2 = bitcast <256 x i32> %src to x86_amx
 // -->
@@ -898,10 +881,12 @@
   Convert(Vec2TileInsts, Intrinsic::x86_cast_tile_to_vector);
   Convert(Tile2VecInsts, Intrinsic::x86_cast_vector_to_tile);
 
-  auto EraseInst = [](SmallVectorImpl<Instruction *> &Insts) {
+  auto EraseInst = [&](SmallVectorImpl<Instruction *> &Insts) {
     for (auto *Inst : Insts) {
-      if (Inst->use_empty())
+      if (Inst->use_empty()) {
         Inst->eraseFromParent();
+        Change = true;
+      }
     }
   };
 
@@ -912,7 +897,7 @@
   for (BasicBlock &BB : Func) {
     for (Instruction &I : BB) {
       if (isAMXCast(&I)) {
-        if (PHINode *PN = dyn_cast<PHINode>(I.getOperand(0)))
+        if (dyn_cast<PHINode>(I.getOperand(0)))
           PhiCastWorkList.push_back(&I);
       }
     }
@@ -1036,17 +1021,18 @@
   }
 
   bool runOnFunction(Function &F) override {
+    bool C = false;
     TargetMachine *TM = &getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
     TargetLibraryInfo *TLI =
         &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
     X86LowerAMXCast LAC(F);
-    LAC.combineAMXcast(TLI);
+    C |= LAC.combineAMXcast(TLI);
     // There might be remaining AMXcast after combineAMXcast and they should be
     // handled elegantly.
-    LAC.transformAllAMXCast();
+    C |= LAC.transformAllAMXCast();
 
     X86LowerAMXType LAT(F);
-    bool C = LAT.visit();
+    C |= LAT.visit();
 
     // Prepare for fast register allocation at O0.
     // Todo: May better check the volatile model of AMX code, not just


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