[PATCH] D105390: [X86] Lower insertions into upper half of an 256-bit vector as broadcast+blend (PR50971)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 17 08:06:59 PDT 2021
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
Sorry for the delay - I'm happy for this to go in as a first step, are you intending to continue investigating multiple insertions?
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:19036
+ ((Subtarget.hasAVX2() && EltSizeInBits != 8) ||
+ (Subtarget.hasAVX() && (EltSizeInBits == 32 || EltSizeInBits == 64) &&
+ MayFoldLoad(N1)))) {
----------------
EltSizeInBits >= 32 ?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D105390/new/
https://reviews.llvm.org/D105390
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