[PATCH] D108186: [AMDGPU] Set wait state for meta instructions to zero
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 16 21:59:28 PDT 2021
cdevadas created this revision.
cdevadas added reviewers: arsenm, rampitec.
Herald added subscribers: foad, kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
cdevadas requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
It looked more reasonable to set the wait state to
zero for all non-instructions. With that, we can avoid
the special handling for them in `getWaitStatesSince`
and `AdvanceCycle`. This NFC patch makes the handling
more generic.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D108186
Files:
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Index: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -1637,7 +1637,10 @@
unsigned SIInstrInfo::getNumWaitStates(const MachineInstr &MI) {
switch (MI.getOpcode()) {
- default: return 1; // FIXME: Do wait states equal cycles?
+ default:
+ if (MI.isMetaInstruction())
+ return 0;
+ return 1; // FIXME: Do wait states equal cycles?
case AMDGPU::S_NOP:
return MI.getOperand(0).getImm() + 1;
Index: llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -349,14 +349,6 @@
return;
}
- // Do not track non-instructions which do not affect the wait states.
- // If included, these instructions can lead to buffer overflow such that
- // detectable hazards are missed.
- if (CurrCycleInstr->isMetaInstruction()) {
- CurrCycleInstr = nullptr;
- return;
- }
-
if (CurrCycleInstr->isBundle()) {
processBundle();
return;
@@ -413,7 +405,7 @@
if (IsHazard(*I))
return WaitStates;
- if (I->isInlineAsm() || I->isMetaInstruction())
+ if (I->isInlineAsm())
continue;
WaitStates += SIInstrInfo::getNumWaitStates(*I);
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