[PATCH] D108022: [AMDGPU] Skip pseudo MIs in hazard recognizer

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas updated this revision to Diff 366724.
cdevadas added a comment.

Added early return from AdvanceCycle if NumWaitStates is zero.
It is required for Post-RA scheduler.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108022/new/

https://reviews.llvm.org/D108022

Files:
  llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/test/CodeGen/AMDGPU/hazard-pseudo-machineinstrs.mir
  llvm/test/CodeGen/AMDGPU/hazard.mir

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