[PATCH] D107945: [RISCV] Use RISCV::RVVBitsPerBlock for RGK_ScalableVector in getRegisterBitWidth.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D107945#2945521 <https://reviews.llvm.org/D107945#2945521>, @sdesmalen wrote:

> According to the description of `getRegisterBitWidth`, the function returns the width of the largest vector register type, which is probably where SVE and RVV are a bit different. For SVE the maximum vector length is always a multiple of 128bits and bounded by maximum vscale, so we can always return ElementCount of 'vscale x 128'. The LV uses this to determine a suitable VF based on the widest element type. e.g. if the maximum element width is 64bits, the maximum VF would be "vscale x 2", whereas if the max element width is 32bits, the maximum VF would be "vscale x 4". RVV can choose different LMULs, so you may want to return a wider bitwidth as default to get a more suitable vectorization factor, or alternatively experiment with adding a new `RGK_*` enum value to request a smaller/wider bitwidth. The LoopVectorizer also has an option to choose a higher bandwidth "-vectorizer-maximize-bandwidth", which forces the LV to choose a higher bitwidth based on the smallest element type in the loop (instead of the biggest element type).

Ignoring LMUL for right now. I think what is in the code right now is wrong so I'd like something that is at least functionally correct. If I just want the vectorizer to use at most LMUL=1, I should return the fixed size of 64 that is used by our lmul=1 types, <vscale x 1 x i64>, <vscale x 2 x i32>, <vscale x 4 x i16>? This is what RISCV::RVVBitsPerBlock represents.


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