[PATCH] D107901: [hwasan] Prevent reordering of tag checks.

[Florian Mayer via Phabricator via llvm-commits]

fmayer updated this revision to Diff 366639.
fmayer added a comment.

add test


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107901/new/

https://reviews.llvm.org/D107901

Files:
  llvm/include/llvm/IR/Intrinsics.td
  llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll


Index: llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll
===================================================================
--- /dev/null
+++ llvm/test/Instrumentation/HWAddressSanitizer/memaccess-clobber.ll
@@ -0,0 +1,20 @@
+; Make sure memaccess checks preceed the following reads.
+;
+; RUN: opt < %s -S -enable-new-pm=0 -hwasan -basic-aa -memdep -print-memdeps -analyze -mtriple aarch64-linux-android30 | FileCheck %s
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64--linux-android10000"
+
+declare void @use32(i32*)
+
+define i32 @test_alloca() sanitize_hwaddress {
+entry:
+  %x = alloca i32, align 4
+  call void @use32(i32* nonnull %x)
+  ; CHECK: Clobber from:   call void @llvm.hwasan.check.memaccess.shortgranule
+  ; CHECK-NEXT: load i32, i32* %x.hwasan, align 4
+  %y = load i32, i32* %x
+  ; CHECK:  Clobber from:   %y = load i32, i32* %x.hwasan, align 4
+  ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 {{.*}}, i8 0, i64 1, i1 false)
+  ret i32 %y
+}
\ No newline at end of file
Index: llvm/include/llvm/IR/Intrinsics.td
===================================================================
--- llvm/include/llvm/IR/Intrinsics.td
+++ llvm/include/llvm/IR/Intrinsics.td
@@ -1570,10 +1570,10 @@
 
 def int_hwasan_check_memaccess :
   Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty, llvm_i32_ty],
-            [IntrInaccessibleMemOnly, ImmArg<ArgIndex<2>>]>;
+            [ImmArg<ArgIndex<2>>]>;
 def int_hwasan_check_memaccess_shortgranules :
   Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty, llvm_i32_ty],
-            [IntrInaccessibleMemOnly, ImmArg<ArgIndex<2>>]>;
+            [ImmArg<ArgIndex<2>>]>;
 
 // Xray intrinsics
 //===----------------------------------------------------------------------===//


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