[llvm] a7dc711 - [InstCombine] Add PR38021 nuw test case.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2021-08-16T12:57:18+01:00
New Revision: a7dc71130ffb41195e2efac2221692875144c18f

URL: https://github.com/llvm/llvm-project/commit/a7dc71130ffb41195e2efac2221692875144c18f
DIFF: https://github.com/llvm/llvm-project/commit/a7dc71130ffb41195e2efac2221692875144c18f.diff

LOG: [InstCombine] Add PR38021 nuw test case.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/AddOverFlow.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/AddOverFlow.ll b/llvm/test/Transforms/InstCombine/AddOverFlow.ll
index 3b7babab6e14..e34e516c8b3e 100644
--- a/llvm/test/Transforms/InstCombine/AddOverFlow.ll
+++ b/llvm/test/Transforms/InstCombine/AddOverFlow.ll
@@ -264,3 +264,14 @@ define i16 @ripple_no_nsw6(i16 %x, i16 %y) {
   %c = add i16 %b, %a
   ret i16 %c
 }
+
+define i8 @PR38021(i8 %x) {
+; CHECK-LABEL: @PR38021(
+; CHECK-NEXT:    [[CLEAR_TOP_3_BITS:%.*]] = lshr i8 [[X:%.*]], 3
+; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i8 [[CLEAR_TOP_3_BITS]], -63
+; CHECK-NEXT:    ret i8 [[ADD]]
+;
+  %clear_top_3_bits = lshr i8 %x, 3
+  %add = add i8 %clear_top_3_bits, 193 ; 0b11000001
+  ret i8 %add
+}