[PATCH] D108117: [AMDGPU] Make BVH isel consistent with other MIMG opcodes

Carl Ritson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 16 04:03:15 PDT 2021


critson created this revision.
critson added reviewers: rampitec, foad.
Herald added subscribers: kerbowa, jfb, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl, arsenm.
critson requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

Suffix opcodes with _gfx10.
Remove direct references to architecture specific opcodes.
Add a BVH flag and apply this to diassembly.
Fix a number of disassembly errors on gfx90a target caused by
previous incorrect BVH detection code.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108117

Files:
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/lib/Target/AMDGPU/MIMGInstructions.td
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
  llvm/test/MC/Disassembler/AMDGPU/mimg_gfx90a.txt

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