[PATCH] D108039: [AArch64][SME] Support NEON scalar FP instructions in streaming mode

David Sherwood via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 16 03:05:36 PDT 2021


david-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:6834
   let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in {
+    // FABD is illegal in streaming mode. FMULX/FRECPS/FRSQRTS are legal.
+    let Predicates = !if(!ne(opc, 0b010), [HasNEONorStreamingSVE],
----------------
Hi @c-rhodes, I think this might look nicer if we just put predicates around the instructions that derive from these classes instead, i.e.

  let Predicate = [HasNEON] in {
    defm FABD     : SIMDFPThreeScalar<1, 1, 0b010, "fabd", int_aarch64_sisd_fabd>;
  }

  let Predicates = [HasNEONorStreamingSVE] in {
    defm FMULX    : SIMDFPThreeScalar<0, 0, 0b011, "fmulx", int_aarch64_neon_fmulx>;
    defm FRECPS   : SIMDFPThreeScalar<0, 0, 0b111, "frecps", int_aarch64_neon_frecps>;
    defm FRSQRTS  : SIMDFPThreeScalar<0, 1, 0b111, "frsqrts", int_aarch64_neon_frsqrts>;
  }



================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:7038
 multiclass SIMDFPTwoScalar<bit U, bit S, bits<5> opc, string asm> {
+  // FRECPE/FRECPX/FRSQRTE are legal in streaming mode.
+  let Predicates = !if(!or(!eq(opc, 0b11101), !eq(opc, 0b11111)),
----------------
Is it possible to do something similar here too, i.e. predicates around the definitions rather than the multiclass? I believe that you can have nested "let Predicates = " commands, right?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108039/new/

https://reviews.llvm.org/D108039



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