[PATCH] D108091: [AggressiveInstCombine] Add shift left instruction to `TruncInstCombine` DAG

Anton Afanasyev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 15 22:32:43 PDT 2021


anton-afanasyev marked an inline comment as done.
anton-afanasyev added a comment.

In D108091#2945739 <https://reviews.llvm.org/D108091#2945739>, @lebedev.ri wrote:

> @spatel this appears correct, but is this the right place for this logic, or should it be in `getMinBitWidth()`?

I've moved code closer to `getMinBitWidth()`, to count known bits for shifts only if correct dag is built. Also added early exit.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108091/new/

https://reviews.llvm.org/D108091



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