[PATCH] D108091: [AggressiveInstCombine] Add shift left instruction to `TruncInstCombine` DAG

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

@spatel this appears correct, but is this the right place for this logic, or should it be in `getMinBitWidth()`?



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Comment at: llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp:111
+      if (I->getOpcode() == Instruction::Shl) {
+        KnownBits KnownRHS = computeKnownBits(I->getOperand(1), DL);
+        const unsigned SrcBitWidth = KnownRHS.getBitWidth();
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anton-afanasyev wrote:
> lebedev.ri wrote:
> > I think you might want to also pass `DT`, `/*CxtI=*/CurrentTruncInst`;
> > i guess we don't yet have `AssumptionCache` here in AIC..
> No, we haven't `AC`, only `DT`. Do you mean me to add it to AIC to use for `computeKnownBits()`?
Let's just keep this as-is for now, and change later with a test case, i guess?


Repository:
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  https://reviews.llvm.org/D108091/new/

https://reviews.llvm.org/D108091