[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3197
+      else if (PatchedName.endswith("sh"))
+        PatchedName = IsVCMP ? "vcmpsh" : "cmpsh";
+      else if (PatchedName.endswith("ph"))
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pengfei wrote:
> LuoYuanke wrote:
> > There is no cmpsh?
> Good catch!
Changing this created bug where this is now accepted

cmpeqsh %xmm0, %xmm1, %k1 


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Comment at: llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp:169
+  case X86::VCMPPHZrrib:    case X86::VCMPPHZrribk:
+  case X86::VCMPSHZrrb_Int: case X86::VCMPSHZrrb_Intk:
     if (Imm >= 0 && Imm <= 31) {
----------------
What about the equivalent code in the Intel printer?


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Comment at: llvm/lib/Target/X86/X86InstrAVX512.td:2670
+let Predicates = [HasFP16] in {
+  def : Pat<(v1i1 (X86cmpms(loadf16 addr:$src2), FR16X:$src1, CommutableCMPCC:$cc)),
+            (VCMPSHZrm FR16X:$src1, addr:$src2, imm:$cc)>;
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This should be synchronized with the CMPSS/CMPSD code.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105264/new/

https://reviews.llvm.org/D105264