[PATCH] D107766: [AggressiveInstCombine] Add shift instructions to `TruncInstCombine` DAG

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

In D107766#2945416 <https://reviews.llvm.org/D107766#2945416>, @anton-afanasyev wrote:

> In D107766#2945161 <https://reviews.llvm.org/D107766#2945161>, @lebedev.ri wrote:
>
>> I think we want to do this in three steps.
>> `lshr` is easy and obvious, but for `ashr` we want to count *sign* bits.
>> Haven't really thought about `shl`
>
> Do you mean splitting this to three separate patches?

Yes.

> `shl` is simpler than both right shifts since it has no bits moved from truncated part to the untruncated one.
> The condition used for `shl` here is necessary and sufficient, whereas it is only sufficient for the right shifts.

That is kind of my point.
At least the left and right shifts have different legality rules,
and different right-shifts also have slightly different rules.
Not having to deal with everything at once will strictly simplify review.


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