[PATCH] D108065: [InstSimplify][AArch64] Eliminate vector reverse of ptrue/dupx intrinsics

[Usman Nadeem via Phabricator via llvm-commits]

mnadeem created this revision.
mnadeem added a reviewer: david-arm.
Herald added subscribers: hiraditya, kristof.beyls.
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After D107793 <https://reviews.llvm.org/D107793> reverse of a splat vector is eliminated.
Added a few more cases that should be simplified.
https://godbolt.org/z/6oc1dPdE9

Not sure if it is appropriate to do this here or better to move this to the target backend.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108065

Files:
  llvm/lib/Analysis/VectorUtils.cpp
  llvm/test/Transforms/InstSimplify/named-vector-shuffle-reverse.ll


Index: llvm/test/Transforms/InstSimplify/named-vector-shuffle-reverse.ll
===================================================================
--- llvm/test/Transforms/InstSimplify/named-vector-shuffle-reverse.ll
+++ llvm/test/Transforms/InstSimplify/named-vector-shuffle-reverse.ll
@@ -22,4 +22,27 @@
   ret <vscale x 4 x i32> %rev
 }
 
+define <vscale x 4 x i1> @splat_ptrue_intr_reverse() {
+; CHECK-LABEL: @splat_ptrue_intr_reverse(
+; CHECK-NEXT:    [[SPLAT:%.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 31)
+; CHECK-NEXT:    ret <vscale x 4 x i1> [[SPLAT]]
+;
+  %splat = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 31)
+  %rev = tail call <vscale x 4 x i1> @llvm.experimental.vector.reverse.nxv4i1(<vscale x 4 x i1> %splat)
+  ret <vscale x 4 x i1> %rev
+}
+
+define <vscale x 4 x i32> @splat_dupx_intr_reverse(i32 %a) {
+; CHECK-LABEL: @splat_dupx_intr_reverse(
+; CHECK-NEXT:    [[SPLAT:%.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[A:%.*]])
+; CHECK-NEXT:    ret <vscale x 4 x i32> [[SPLAT]]
+;
+  %splat= call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %a)
+  %rev = tail call <vscale x 4 x i32> @llvm.experimental.vector.reverse.nxv4i32(<vscale x 4 x i32> %splat)
+  ret <vscale x 4 x i32> %rev
+}
+
+declare <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 %pattern)
+declare <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32)
+declare <vscale x 4 x i1> @llvm.experimental.vector.reverse.nxv4i1(<vscale x 4 x i1>)
 declare <vscale x 4 x i32> @llvm.experimental.vector.reverse.nxv4i32(<vscale x 4 x i32>)
Index: llvm/lib/Analysis/VectorUtils.cpp
===================================================================
--- llvm/lib/Analysis/VectorUtils.cpp
+++ llvm/lib/Analysis/VectorUtils.cpp
@@ -22,6 +22,7 @@
 #include "llvm/IR/Constants.h"
 #include "llvm/IR/GetElementPtrTypeIterator.h"
 #include "llvm/IR/IRBuilder.h"
+#include "llvm/IR/IntrinsicsAArch64.h"
 #include "llvm/IR/PatternMatch.h"
 #include "llvm/IR/Value.h"
 #include "llvm/Support/CommandLine.h"
@@ -413,6 +414,14 @@
     return isSplatValue(X, Index, Depth) && isSplatValue(Y, Index, Depth) &&
            isSplatValue(Z, Index, Depth);
 
+  // aarch64_sve_ptrue(31) is an all true predicate i.e. splat(i1 1).
+  if (match(V, m_Intrinsic<Intrinsic::aarch64_sve_ptrue>(m_SpecificInt(31))))
+    return true;
+
+  // aarch64_sve_dup_x is splat operation.
+  if (match(V, m_Intrinsic<Intrinsic::aarch64_sve_dup_x>()))
+    return true;
+
   // TODO: Add support for unary ops (fneg), casts, intrinsics (overflow ops).
 
   return false;


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