[llvm] 92ce6db - [NFC] Rename AttributeList::hasFnAttribute() -> hasFnAttr()
Arthur Eubanks via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 13 11:11:46 PDT 2021
Author: Arthur Eubanks
Date: 2021-08-13T11:09:18-07:00
New Revision: 92ce6db9ee7666a347fccf0f72ba3225b199d6d1
URL: https://github.com/llvm/llvm-project/commit/92ce6db9ee7666a347fccf0f72ba3225b199d6d1
DIFF: https://github.com/llvm/llvm-project/commit/92ce6db9ee7666a347fccf0f72ba3225b199d6d1.diff
LOG: [NFC] Rename AttributeList::hasFnAttribute() -> hasFnAttr()
This is more consistent with similar methods.
Added:
Modified:
clang/lib/CodeGen/CGCall.cpp
llvm/include/llvm/IR/Attributes.h
llvm/include/llvm/IR/Function.h
llvm/include/llvm/IR/InstrTypes.h
llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/IR/Attributes.cpp
llvm/lib/IR/Instructions.cpp
llvm/lib/IR/Verifier.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
llvm/unittests/IR/AttributesTest.cpp
Removed:
################################################################################
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 43be6755a0745..04ecfacf02c02 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -5232,7 +5232,7 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo,
CannotThrow = true;
} else {
// Otherwise, nounwind call sites will never throw.
- CannotThrow = Attrs.hasFnAttribute(llvm::Attribute::NoUnwind);
+ CannotThrow = Attrs.hasFnAttr(llvm::Attribute::NoUnwind);
if (auto *FPtr = dyn_cast<llvm::Function>(CalleePtr))
if (FPtr->hasFnAttribute(llvm::Attribute::NoUnwind))
diff --git a/llvm/include/llvm/IR/Attributes.h b/llvm/include/llvm/IR/Attributes.h
index d28a4b4de1bf7..019fe45094c98 100644
--- a/llvm/include/llvm/IR/Attributes.h
+++ b/llvm/include/llvm/IR/Attributes.h
@@ -654,11 +654,11 @@ class AttributeList {
/// Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
/// may be faster.
- bool hasFnAttribute(Attribute::AttrKind Kind) const;
+ bool hasFnAttr(Attribute::AttrKind Kind) const;
/// Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
/// may be faster.
- bool hasFnAttribute(StringRef Kind) const;
+ bool hasFnAttr(StringRef Kind) const;
/// Return true if the specified attribute is set for at least one
/// parameter or for the return value. If Index is not nullptr, the index
diff --git a/llvm/include/llvm/IR/Function.h b/llvm/include/llvm/IR/Function.h
index 6d98f53157d27..d1c8a231d45aa 100644
--- a/llvm/include/llvm/IR/Function.h
+++ b/llvm/include/llvm/IR/Function.h
@@ -353,12 +353,12 @@ class Function : public GlobalObject, public ilist_node<Function> {
/// Return true if the function has the attribute.
bool hasFnAttribute(Attribute::AttrKind Kind) const {
- return AttributeSets.hasFnAttribute(Kind);
+ return AttributeSets.hasFnAttr(Kind);
}
/// Return true if the function has the attribute.
bool hasFnAttribute(StringRef Kind) const {
- return AttributeSets.hasFnAttribute(Kind);
+ return AttributeSets.hasFnAttr(Kind);
}
/// Return the attribute for the given attribute kind.
diff --git a/llvm/include/llvm/IR/InstrTypes.h b/llvm/include/llvm/IR/InstrTypes.h
index ef2c279ed4552..aab51f113fe38 100644
--- a/llvm/include/llvm/IR/InstrTypes.h
+++ b/llvm/include/llvm/IR/InstrTypes.h
@@ -2258,7 +2258,7 @@ class CallBase : public Instruction {
bool hasFnAttrOnCalledFunction(StringRef Kind) const;
template <typename AttrKind> bool hasFnAttrImpl(AttrKind Kind) const {
- if (Attrs.hasFnAttribute(Kind))
+ if (Attrs.hasFnAttr(Kind))
return true;
// Operand bundles override attributes on the called function, but don't
diff --git a/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp b/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
index 0214f8901a46d..a85dd7553b086 100644
--- a/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
+++ b/llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
@@ -479,7 +479,7 @@ static void computeFunctionSummary(
F.hasFnAttribute(Attribute::NoRecurse), F.returnDoesNotAlias(),
// FIXME: refactor this to use the same code that inliner is using.
// Don't try to import functions with noinline attribute.
- F.getAttributes().hasFnAttribute(Attribute::NoInline),
+ F.getAttributes().hasFnAttr(Attribute::NoInline),
F.hasFnAttribute(Attribute::AlwaysInline)};
std::vector<FunctionSummary::ParamAccess> ParamAccesses;
if (auto *SSI = GetSSICallback(F))
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 7e3198af02cd6..2b980ecb0236a 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1392,7 +1392,7 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
AttributeList Attrs
= Intrinsic::getAttributes(MF->getFunction().getContext(),
static_cast<Intrinsic::ID>(IntrID));
- bool DeclHasSideEffects = !Attrs.hasFnAttribute(Attribute::ReadNone);
+ bool DeclHasSideEffects = !Attrs.hasFnAttr(Attribute::ReadNone);
if (NoSideEffects && DeclHasSideEffects) {
report("G_INTRINSIC used with intrinsic that accesses memory", MI);
break;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 074ddaf4848a3..0786dc395b409 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -6419,7 +6419,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
SDValue Op = getValue(I.getArgOperand(0));
SDNodeFlags Flags;
Flags.setNoFPExcept(
- !F.getAttributes().hasFnAttribute(llvm::Attribute::StrictFP));
+ !F.getAttributes().hasFnAttr(llvm::Attribute::StrictFP));
// If ISD::ISNAN should be expanded, do it right now, because the expansion
// can use illegal types. Making expansion early allows to legalize these
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index dd282a3beae83..cdb3aedf4d234 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -4336,7 +4336,7 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
// When division is cheap or optimizing for minimum size,
// fall through to DIVREM creation by skipping this fold.
- if (!isIntDivCheap(VT, Attr) && !Attr.hasFnAttribute(Attribute::MinSize)) {
+ if (!isIntDivCheap(VT, Attr) && !Attr.hasFnAttr(Attribute::MinSize)) {
if (N0.getOpcode() == ISD::UREM) {
if (SDValue Folded = buildUREMEqFold(VT, N0, N1, Cond, DCI, dl))
return Folded;
diff --git a/llvm/lib/IR/Attributes.cpp b/llvm/lib/IR/Attributes.cpp
index ea71472a47cad..59c0ced90fbb7 100644
--- a/llvm/lib/IR/Attributes.cpp
+++ b/llvm/lib/IR/Attributes.cpp
@@ -1397,11 +1397,11 @@ bool AttributeList::hasAttributes(unsigned Index) const {
return getAttributes(Index).hasAttributes();
}
-bool AttributeList::hasFnAttribute(Attribute::AttrKind Kind) const {
+bool AttributeList::hasFnAttr(Attribute::AttrKind Kind) const {
return pImpl && pImpl->hasFnAttribute(Kind);
}
-bool AttributeList::hasFnAttribute(StringRef Kind) const {
+bool AttributeList::hasFnAttr(StringRef Kind) const {
return hasAttribute(AttributeList::FunctionIndex, Kind);
}
diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp
index 298cf0598224b..652a87d929ab2 100644
--- a/llvm/lib/IR/Instructions.cpp
+++ b/llvm/lib/IR/Instructions.cpp
@@ -352,13 +352,13 @@ bool CallBase::paramHasAttr(unsigned ArgNo, Attribute::AttrKind Kind) const {
bool CallBase::hasFnAttrOnCalledFunction(Attribute::AttrKind Kind) const {
if (const Function *F = getCalledFunction())
- return F->getAttributes().hasFnAttribute(Kind);
+ return F->getAttributes().hasFnAttr(Kind);
return false;
}
bool CallBase::hasFnAttrOnCalledFunction(StringRef Kind) const {
if (const Function *F = getCalledFunction())
- return F->getAttributes().hasFnAttribute(Kind);
+ return F->getAttributes().hasFnAttr(Kind);
return false;
}
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 1a66755f4668f..eb4a3b0893099 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -1824,7 +1824,7 @@ void Verifier::verifyParameterAttrs(AttributeSet Attrs, Type *Ty,
void Verifier::checkUnsignedBaseTenFuncAttr(AttributeList Attrs, StringRef Attr,
const Value *V) {
- if (Attrs.hasFnAttribute(Attr)) {
+ if (Attrs.hasFnAttr(Attr)) {
StringRef S = Attrs.getAttribute(AttributeList::FunctionIndex, Attr)
.getValueAsString();
unsigned N;
@@ -1939,50 +1939,50 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT, AttributeList Attrs,
"' does not apply to functions!",
V);
- Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
- Attrs.hasFnAttribute(Attribute::ReadOnly)),
+ Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
+ Attrs.hasFnAttr(Attribute::ReadOnly)),
"Attributes 'readnone and readonly' are incompatible!", V);
- Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
- Attrs.hasFnAttribute(Attribute::WriteOnly)),
+ Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
+ Attrs.hasFnAttr(Attribute::WriteOnly)),
"Attributes 'readnone and writeonly' are incompatible!", V);
- Assert(!(Attrs.hasFnAttribute(Attribute::ReadOnly) &&
- Attrs.hasFnAttribute(Attribute::WriteOnly)),
+ Assert(!(Attrs.hasFnAttr(Attribute::ReadOnly) &&
+ Attrs.hasFnAttr(Attribute::WriteOnly)),
"Attributes 'readonly and writeonly' are incompatible!", V);
- Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
- Attrs.hasFnAttribute(Attribute::InaccessibleMemOrArgMemOnly)),
+ Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
+ Attrs.hasFnAttr(Attribute::InaccessibleMemOrArgMemOnly)),
"Attributes 'readnone and inaccessiblemem_or_argmemonly' are "
"incompatible!",
V);
- Assert(!(Attrs.hasFnAttribute(Attribute::ReadNone) &&
- Attrs.hasFnAttribute(Attribute::InaccessibleMemOnly)),
+ Assert(!(Attrs.hasFnAttr(Attribute::ReadNone) &&
+ Attrs.hasFnAttr(Attribute::InaccessibleMemOnly)),
"Attributes 'readnone and inaccessiblememonly' are incompatible!", V);
- Assert(!(Attrs.hasFnAttribute(Attribute::NoInline) &&
- Attrs.hasFnAttribute(Attribute::AlwaysInline)),
+ Assert(!(Attrs.hasFnAttr(Attribute::NoInline) &&
+ Attrs.hasFnAttr(Attribute::AlwaysInline)),
"Attributes 'noinline and alwaysinline' are incompatible!", V);
- if (Attrs.hasFnAttribute(Attribute::OptimizeNone)) {
- Assert(Attrs.hasFnAttribute(Attribute::NoInline),
+ if (Attrs.hasFnAttr(Attribute::OptimizeNone)) {
+ Assert(Attrs.hasFnAttr(Attribute::NoInline),
"Attribute 'optnone' requires 'noinline'!", V);
- Assert(!Attrs.hasFnAttribute(Attribute::OptimizeForSize),
+ Assert(!Attrs.hasFnAttr(Attribute::OptimizeForSize),
"Attributes 'optsize and optnone' are incompatible!", V);
- Assert(!Attrs.hasFnAttribute(Attribute::MinSize),
+ Assert(!Attrs.hasFnAttr(Attribute::MinSize),
"Attributes 'minsize and optnone' are incompatible!", V);
}
- if (Attrs.hasFnAttribute(Attribute::JumpTable)) {
+ if (Attrs.hasFnAttr(Attribute::JumpTable)) {
const GlobalValue *GV = cast<GlobalValue>(V);
Assert(GV->hasGlobalUnnamedAddr(),
"Attribute 'jumptable' requires 'unnamed_addr'", V);
}
- if (Attrs.hasFnAttribute(Attribute::AllocSize)) {
+ if (Attrs.hasFnAttr(Attribute::AllocSize)) {
std::pair<unsigned, Optional<unsigned>> Args =
Attrs.getAllocSizeArgs(AttributeList::FunctionIndex);
@@ -2009,7 +2009,7 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT, AttributeList Attrs,
return;
}
- if (Attrs.hasFnAttribute(Attribute::VScaleRange)) {
+ if (Attrs.hasFnAttr(Attribute::VScaleRange)) {
std::pair<unsigned, unsigned> Args =
Attrs.getVScaleRangeArgs(AttributeList::FunctionIndex);
@@ -2017,7 +2017,7 @@ void Verifier::verifyFunctionAttrs(FunctionType *FT, AttributeList Attrs,
CheckFailed("'vscale_range' minimum cannot be greater than maximum", V);
}
- if (Attrs.hasFnAttribute("frame-pointer")) {
+ if (Attrs.hasFnAttr("frame-pointer")) {
StringRef FP = Attrs.getAttribute(AttributeList::FunctionIndex,
"frame-pointer").getValueAsString();
if (FP != "all" && FP != "non-leaf" && FP != "none")
@@ -2334,7 +2334,7 @@ void Verifier::visitFunction(const Function &F) {
// On function declarations/definitions, we do not support the builtin
// attribute. We do not check this in VerifyFunctionAttrs since that is
// checking for Attributes that can/can not ever be on functions.
- Assert(!Attrs.hasFnAttribute(Attribute::Builtin),
+ Assert(!Attrs.hasFnAttr(Attribute::Builtin),
"Attribute 'builtin' can only be applied to a callsite.", &F);
Assert(!Attrs.hasAttrSomewhere(Attribute::ElementType),
@@ -3071,14 +3071,14 @@ void Verifier::visitCallBase(CallBase &Call) {
Assert(Callee->getValueType() == FTy,
"Intrinsic called with incompatible signature", Call);
- if (Attrs.hasFnAttribute(Attribute::Speculatable)) {
+ if (Attrs.hasFnAttr(Attribute::Speculatable)) {
// Don't allow speculatable on call sites, unless the underlying function
// declaration is also speculatable.
Assert(Callee && Callee->isSpeculatable(),
"speculatable attribute may not apply to call sites", Call);
}
- if (Attrs.hasFnAttribute(Attribute::Preallocated)) {
+ if (Attrs.hasFnAttr(Attribute::Preallocated)) {
Assert(Call.getCalledFunction()->getIntrinsicID() ==
Intrinsic::call_preallocated_arg,
"preallocated as a call site attribute can only be on "
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 732310c58ec3c..baa3feda74d3a 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -12053,8 +12053,7 @@ SDValue AArch64TargetLowering::LowerSVEStructLoad(unsigned Intrinsic,
EVT AArch64TargetLowering::getOptimalMemOpType(
const MemOp &Op, const AttributeList &FuncAttributes) const {
- bool CanImplicitFloat =
- !FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat);
+ bool CanImplicitFloat = !FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat);
bool CanUseNEON = Subtarget->hasNEON() && CanImplicitFloat;
bool CanUseFP = Subtarget->hasFPARMv8() && CanImplicitFloat;
// Only use AdvSIMD to implement memset of 32-byte and above. It would have
@@ -12084,8 +12083,7 @@ EVT AArch64TargetLowering::getOptimalMemOpType(
LLT AArch64TargetLowering::getOptimalMemOpLLT(
const MemOp &Op, const AttributeList &FuncAttributes) const {
- bool CanImplicitFloat =
- !FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat);
+ bool CanImplicitFloat = !FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat);
bool CanUseNEON = Subtarget->hasNEON() && CanImplicitFloat;
bool CanUseFP = Subtarget->hasFPARMv8() && CanImplicitFloat;
// Only use AdvSIMD to implement memset of 32-byte and above. It would have
@@ -17851,7 +17849,7 @@ bool AArch64TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const {
// integer division, leaving the division as-is is a loss even in terms of
// size, because it will have to be scalarized, while the alternative code
// sequence can be performed in vector form.
- bool OptSize = Attr.hasFnAttribute(Attribute::MinSize);
+ bool OptSize = Attr.hasFnAttr(Attribute::MinSize);
return OptSize && !VT.isVector();
}
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 41dcffdf2d459..0d21d77d60470 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1066,7 +1066,7 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
AMDGPU::lookupRsrcIntrinsic(IntrID)) {
AttributeList Attr = Intrinsic::getAttributes(CI.getContext(),
(Intrinsic::ID)IntrID);
- if (Attr.hasFnAttribute(Attribute::ReadNone))
+ if (Attr.hasFnAttr(Attribute::ReadNone))
return false;
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
@@ -1081,7 +1081,7 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
}
Info.flags = MachineMemOperand::MODereferenceable;
- if (Attr.hasFnAttribute(Attribute::ReadOnly)) {
+ if (Attr.hasFnAttr(Attribute::ReadOnly)) {
unsigned DMaskLanes = 4;
if (RsrcIntr->IsImage) {
@@ -1105,7 +1105,7 @@ bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
// FIXME: What does alignment mean for an image?
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.flags |= MachineMemOperand::MOLoad;
- } else if (Attr.hasFnAttribute(Attribute::WriteOnly)) {
+ } else if (Attr.hasFnAttr(Attribute::WriteOnly)) {
Info.opc = ISD::INTRINSIC_VOID;
Type *DataTy = CI.getArgOperand(0)->getType();
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 9e7f40301d92e..715725aa093a4 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2289,7 +2289,7 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
bool PreferIndirect = false;
// Determine whether this is a non-secure function call.
- if (CLI.CB && CLI.CB->getAttributes().hasFnAttribute("cmse_nonsecure_call"))
+ if (CLI.CB && CLI.CB->getAttributes().hasFnAttr("cmse_nonsecure_call"))
isCmseNSCall = true;
// Disable tail calls if they're not supported.
@@ -18134,7 +18134,7 @@ EVT ARMTargetLowering::getOptimalMemOpType(
const MemOp &Op, const AttributeList &FuncAttributes) const {
// See if we can use NEON instructions for this...
if ((Op.isMemcpy() || Op.isZeroMemset()) && Subtarget->hasNEON() &&
- !FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat)) {
+ !FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat)) {
bool Fast;
if (Op.size() >= 16 &&
(Op.isAligned(Align(16)) ||
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
index b7d0f57471f0c..fdc413d08b77d 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
@@ -703,7 +703,7 @@ void NVPTXAsmPrinter::emitDeclarations(const Module &M, raw_ostream &O) {
for (Module::const_iterator FI = M.begin(), FE = M.end(); FI != FE; ++FI) {
const Function *F = &*FI;
- if (F->getAttributes().hasFnAttribute("nvptx-libcall-callee")) {
+ if (F->getAttributes().hasFnAttr("nvptx-libcall-callee")) {
emitDeclaration(F, O);
continue;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 12f6804b3d764..72e9a2b4b29a7 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2365,7 +2365,7 @@ unsigned X86TargetLowering::getByValTypeAlignment(Type *Ty,
/// preferred vector width.
EVT X86TargetLowering::getOptimalMemOpType(
const MemOp &Op, const AttributeList &FuncAttributes) const {
- if (!FuncAttributes.hasFnAttribute(Attribute::NoImplicitFloat)) {
+ if (!FuncAttributes.hasFnAttr(Attribute::NoImplicitFloat)) {
if (Op.size() >= 16 &&
(!Subtarget.isUnalignedMem16Slow() || Op.isAligned(Align(16)))) {
// FIXME: Check if unaligned 64-byte accesses are slow.
@@ -52761,7 +52761,7 @@ bool X86TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const {
// integer division, leaving the division as-is is a loss even in terms of
// size, because it will have to be scalarized, while the alternative code
// sequence can be performed in vector form.
- bool OptSize = Attr.hasFnAttribute(Attribute::MinSize);
+ bool OptSize = Attr.hasFnAttr(Attribute::MinSize);
return OptSize && !VT.isVector();
}
diff --git a/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp b/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
index 85410c54a4d2e..732b2b1a5ada6 100644
--- a/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
+++ b/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
@@ -92,7 +92,7 @@ static bool IsCallReturnTwice(llvm::MachineOperand &MOp) {
if (!CalleeFn)
return false;
AttributeList Attrs = CalleeFn->getAttributes();
- return Attrs.hasFnAttribute(Attribute::ReturnsTwice);
+ return Attrs.hasFnAttr(Attribute::ReturnsTwice);
}
bool X86IndirectBranchTrackingPass::runOnMachineFunction(MachineFunction &MF) {
diff --git a/llvm/unittests/IR/AttributesTest.cpp b/llvm/unittests/IR/AttributesTest.cpp
index 37f9f310edabc..4ba790058f8ce 100644
--- a/llvm/unittests/IR/AttributesTest.cpp
+++ b/llvm/unittests/IR/AttributesTest.cpp
@@ -64,12 +64,12 @@ TEST(Attributes, AddAttributes) {
AttrBuilder B;
B.addAttribute(Attribute::NoReturn);
AL = AL.addAttributes(C, AttributeList::FunctionIndex, AttributeSet::get(C, B));
- EXPECT_TRUE(AL.hasFnAttribute(Attribute::NoReturn));
+ EXPECT_TRUE(AL.hasFnAttr(Attribute::NoReturn));
B.clear();
B.addAttribute(Attribute::SExt);
AL = AL.addAttributes(C, AttributeList::ReturnIndex, B);
EXPECT_TRUE(AL.hasAttribute(AttributeList::ReturnIndex, Attribute::SExt));
- EXPECT_TRUE(AL.hasFnAttribute(Attribute::NoReturn));
+ EXPECT_TRUE(AL.hasFnAttr(Attribute::NoReturn));
}
TEST(Attributes, RemoveAlign) {
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