[PATCH] D108022: [AMDGPU] Skip pseudo MIs in hazard recognizer

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D108022#2943806 <https://reviews.llvm.org/D108022#2943806>, @cdevadas wrote:

> In D108022#2943730 <https://reviews.llvm.org/D108022#2943730>, @arsenm wrote:
>
>> I think you're missing the check in AdvanceCycle
>
> There was a call to getNumWaitStates in AdvanceCycle. I presumed a zero waitstate here is equivalent to an early return.
> Isn't it?
> https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp#L365

I think the early return on isMetaInstruction avoids pushing the instruction into EmittedInstrs


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  https://reviews.llvm.org/D108022/new/

https://reviews.llvm.org/D108022