[PATCH] D108024: [InlineASM][x86] Fix call external function in pic

[Xiang Zhang via Phabricator via llvm-commits]

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This is a back end fix for https://reviews.llvm.org/D107523  [[Inline asm] Correct the constrain for function call in inline asm]

The following code will generate one more time load for “sincos” with cmd “clang -fasm-blocks t.c -fpic -S -emit-llvm” + “llc t.ll”
t.c:

  1 extern void sincos ();
  2 void foo (){
  3    __asm{
  4    call  sincos
  5    ret };
  6 }

t.ll:

   1 define void @foo() #0 {
   2 entry:
   3   call void asm sideeffect inteldialect "call qword ptr ${0:P}\0A\09ret", "*m,~{dirflag},~{fpsr},~{flags}"(void (...)* @sincos) #2, !srcloc !5
  4   ret void
  5 }

t.s:

  1         movq    sincos at GOTPCREL(%rip), %rax        // now the rax has been the function address  “sincos”
  2 #APP
  3       callq   *(%rax)                                                   //  the call should directly read the %rax, should not “load” it again, it should be “callq *%rax” or better code “call sincos at plt”
  4        retq
  5 #NO_APP


https://reviews.llvm.org/D108024

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/test/CodeGen/X86/semantic-interposition-asm.ll


Index: llvm/test/CodeGen/X86/semantic-interposition-asm.ll
===================================================================
--- llvm/test/CodeGen/X86/semantic-interposition-asm.ll
+++ llvm/test/CodeGen/X86/semantic-interposition-asm.ll
@@ -61,9 +61,10 @@
 ; CHECK-LABEL: test_fun:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq fun1 at GOTPCREL(%rip), %rax
+; CHECK-NEXT:    movq %rax, -{{[0-9]+}}(%rsp)
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    movq .Lfun0$local(%rip), %rax
-; CHECK-NEXT:    movq (%rax), %rax
+; CHECK-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
 ; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:    retq
 entry:
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -8550,6 +8550,36 @@
         OpInfo.Type == InlineAsm::isClobber)
       continue;
 
+    // TODO: Current arch of inline asm is not friendly to add special action
+    // for special instructions. So we add an unstandard/temp fix here, we
+    // need to refine it.
+    //
+    // Currently Clang will generate call func_name with "*m" constrain and
+    // "func_type * @func_name" in inlineasm.
+    // Not "m" + "func_type * @func_name" or "*m" + "func_type ** func".
+    // So backend we have 1 more time "load".
+    //
+    // For example: (clang -S -fasm-blocks -emit-llvm -fpic test.c)
+    // test.c:
+    // extern void func ();  void foo () {  __asm{ call sincos_asm; ret \n }; }
+    //
+    // will generate:
+    // IR:
+    // call void asm sideeffect inteldialect "call qword ptr ${0:P}",
+    // "*m,~{dirflag},~{fpsr},~{flags}"(void (...)* @func)
+    // asm:
+    // movq    func at GOTPCREL(%rip), %rax   \n      callq   *(%rax)
+    //
+    // we should directly "call *%rax" not "callq *(%rax)"
+    //
+    // So, here we manuly change the "*m" to "m".
+    if (OpInfo.CallOperand.getNode()
+        && TLI.isPositionIndependent()
+        && DAG.getSubtarget().getTargetTriple().isX86()
+        && OpInfo.CallOperand.getOpcode() == ISD::GlobalAddress
+        && OpInfo.CallOperandVal->getValueID() == Value::FunctionVal)
+      OpInfo.isIndirect = false;
+
     // If this is a memory input, and if the operand is not indirect, do what we
     // need to provide an address for the memory input.
     if (OpInfo.ConstraintType == TargetLowering::C_Memory &&


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