[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

[Pengfei Wang via Phabricator via llvm-commits]

pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3197
+      else if (PatchedName.endswith("sh"))
+        PatchedName = IsVCMP ? "vcmpsh" : "cmpsh";
+      else if (PatchedName.endswith("ph"))
----------------
LuoYuanke wrote:
> There is no cmpsh?
Good catch!


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:1873
       setOperationAction(ISD::SETCC,              VT, Custom);
+      setOperationAction(ISD::STRICT_FSETCC,      VT, Custom);
+      setOperationAction(ISD::STRICT_FSETCCS,     VT, Custom);
----------------
LuoYuanke wrote:
> Is this related to FP16?
Yes, but it's better to move them together with other FP16 settings.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105264/new/

https://reviews.llvm.org/D105264