[PATCH] D107901: [hwasan] Prevent reordering of tag checks.

[Florian Mayer via Phabricator via llvm-commits]

fmayer created this revision.
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fmayer updated this revision to Diff 365786.
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fmayer added reviewers: eugenis, pcc.
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fmayer added a comment.

I ran 50 iterations of pdfium_test with baseline vs. this change and could see no statistically significant change (p-value is 88%): https://colab.research.google.com/drive/1BBOT0BYGnvS9bvbryMNyAsVBbVM30gx5#scrollTo=cfis4f2vI305


They were previously unconstrained, which allowed them to be reordered
before the shadow memory write.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D107901

Files:
  llvm/include/llvm/IR/Intrinsics.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td


Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -1298,14 +1298,14 @@
 def MOVbaseTLS : Pseudo<(outs GPR64:$dst), (ins),
                        [(set GPR64:$dst, AArch64threadpointer)]>, Sched<[WriteSys]>;
 
-let Uses = [ X9 ], Defs = [ X16, X17, LR, NZCV ] in {
+let Uses = [ X9 ], Defs = [ X16, X17, LR, NZCV ], mayLoad = 1, mayStore = 1 in {
 def HWASAN_CHECK_MEMACCESS : Pseudo<
   (outs), (ins GPR64noip:$ptr, i32imm:$accessinfo),
   [(int_hwasan_check_memaccess X9, GPR64noip:$ptr, (i32 timm:$accessinfo))]>,
   Sched<[]>;
 }
 
-let Uses = [ X20 ], Defs = [ X16, X17, LR, NZCV ] in {
+let Uses = [ X20 ], Defs = [ X16, X17, LR, NZCV ], mayLoad = 1, mayStore = 1 in {
 def HWASAN_CHECK_MEMACCESS_SHORTGRANULES : Pseudo<
   (outs), (ins GPR64noip:$ptr, i32imm:$accessinfo),
   [(int_hwasan_check_memaccess_shortgranules X20, GPR64noip:$ptr, (i32 timm:$accessinfo))]>,
Index: llvm/include/llvm/IR/Intrinsics.td
===================================================================
--- llvm/include/llvm/IR/Intrinsics.td
+++ llvm/include/llvm/IR/Intrinsics.td
@@ -1570,10 +1570,10 @@
 
 def int_hwasan_check_memaccess :
   Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty, llvm_i32_ty],
-            [IntrInaccessibleMemOnly, ImmArg<ArgIndex<2>>]>;
+            [ImmArg<ArgIndex<2>>]>;
 def int_hwasan_check_memaccess_shortgranules :
   Intrinsic<[], [llvm_ptr_ty, llvm_ptr_ty, llvm_i32_ty],
-            [IntrInaccessibleMemOnly, ImmArg<ArgIndex<2>>]>;
+            [ImmArg<ArgIndex<2>>]>;
 
 // Xray intrinsics
 //===----------------------------------------------------------------------===//


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