[PATCH] D107883: [RISCV] Select vector mul by 2 to a vector add.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 11 09:11:10 PDT 2021
craig.topper added a comment.
DAGCombine should turn mul by 2 into shl. Except that it can't for scalable vectors because isKnownToBeAPowerOfTwo doesn't work for scalable vectors. We should just make DAG combine work even if we have just have to special case SPLAT_VECTOR.
// fold (mul x, (1 << c)) -> x << c
if (isConstantOrConstantVector(N1, /*NoOpaques*/ true) &&
DAG.isKnownToBeAPowerOfTwo(N1) &&
(!VT.isVector() || Level <= AfterLegalizeVectorOps)) {
SDLoc DL(N);
SDValue LogBase2 = BuildLogBase2(N1, DL);
EVT ShiftVT = getShiftAmountTy(N0.getValueType());
SDValue Trunc = DAG.getZExtOrTrunc(LogBase2, DL, ShiftVT);
return DAG.getNode(ISD::SHL, DL, VT, N0, Trunc);
}
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107883/new/
https://reviews.llvm.org/D107883
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