[PATCH] D107210: [RISCV] Support interleaved load lowering
Luke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 11 04:36:31 PDT 2021
luke957 updated this revision to Diff 365715.
luke957 added a comment.
Update
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107210/new/
https://reviews.llvm.org/D107210
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D107210.365715.patch
Type: text/x-patch
Size: 8822 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210811/1b6dbe14/attachment.bin>
More information about the llvm-commits
mailing list