[PATCH] D107844: [WIP] Ignore def operand when determining whether an instruction is remat.

Mircea Trofin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 10 10:15:53 PDT 2021


mtrofin created this revision.
mtrofin added a reviewer: stoklund.
Herald added subscribers: ChuanqiXu, hiraditya.
mtrofin requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

DO NOT SUBMIT (YET)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D107844

Files:
  llvm/lib/CodeGen/TargetInstrInfo.cpp


Index: llvm/lib/CodeGen/TargetInstrInfo.cpp
===================================================================
--- llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -957,7 +957,7 @@
 
   // If any of the registers accessed are non-constant, conservatively assume
   // the instruction is not rematerializable.
-  for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
+  for (unsigned i = 1, e = MI.getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI.getOperand(i);
     if (!MO.isReg()) continue;
     Register Reg = MO.getReg();


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