[PATCH] D107790: [RISCV] Add a pass to recognize VLS strided loads/store from gather/scatter.
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 10 07:16:16 PDT 2021
frasercrmck added a comment.
I'll do a further review later when I find some time.
One thing is that I'd be interested to see is this expanded to scalable vector types. Selfishly speaking, our vectorizer will emit the scalable-vector equivalent. The only real difference, I think, is that the strided "constant" is a `llvm.experimental.stepvector` optionally followed by `mul` and possibly some other operations. How difficult do you think it would be to support this? I don't see why the llvm loop vectorizer couldn't do something similar if it doesn't already.
I could do that as a follow-up patch: I don't mean to derail this one. I just want to source your thoughts at this stage.
================
Comment at: llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp:82
+
+static bool isLegalElementType(Type *ScalarTy, const RISCVSubtarget *ST) {
+ if (ScalarTy->isIntegerTy(8) || ScalarTy->isIntegerTy(16) ||
----------------
Is there a way of sharing this with `RISCVTargetTransformInfo`'s `isLegalElementTypeForRVV`?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D107790/new/
https://reviews.llvm.org/D107790
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