[PATCH] D106261: [ARM][LowOverheadLoops] Allow unpredicated VORRs if the operand def produces zeroed false lanes

[Sam Tebbs via Phabricator via llvm-commits]

samtebbs added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:882
 
+  // An unpredicated VORR on identical operands mimics a VMOV and doesn't modify
+  // the incoming lane values, so it produces zeroed false lanes if the operand
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samparker wrote:
> This is the same for most of the instructions that we check here, and this logic is almost the same as the loop at the bottom of the function. So shouldn't the dominates check just be inserted in there instead? I'm slightly dubious about that tbh! This algorithm is working on the basis that the instructions in FalseLanesZero have been proved to behaviour how we want. Adding a VORR in there based upon future checks breaks our assumptions. I feel like this is better handled in ValidateLiveOuts when you've got the whole loop body analysed and you can add some extra logic when scanning though FalseLanesUnknown.
Sorry for the delay in getting back to this and thanks for the feedback. I'll have a go at migrating this to ValidateLiveOuts.


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https://reviews.llvm.org/D106261