[PATCH] D107697: [RISCV] Insert sext_inreg when type legalizing add/sub/mul with constant LHS.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 8 10:23:34 PDT 2021
craig.topper updated this revision to Diff 365036.
craig.topper added a comment.
Rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107697/new/
https://reviews.llvm.org/D107697
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/add-imm.ll
llvm/test/CodeGen/RISCV/alu32.ll
llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
llvm/test/CodeGen/RISCV/mul.ll
llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
llvm/test/CodeGen/RISCV/setcc-logic.ll
llvm/test/CodeGen/RISCV/split-offsets.ll
llvm/test/CodeGen/RISCV/vararg.ll
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