[PATCH] D107697: [RISCV] Inserting sext_inreg when type legalizing add/sub/mul with constant LHS.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: asb, luismarques, frasercrmck, evandro, HsiangKai, arcbbb, khchen.
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We already do this for non-constants RHS. This just removes the
special case. I believe the special case may have been needed
because the ANY_EXTEND of a constant used to create zero extended
constants, but we recently changed that to produce sign extended
constants.

D107658 <https://reviews.llvm.org/D107658> is needed to prevent some regressions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D107697

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/add-imm.ll
  llvm/test/CodeGen/RISCV/alu32.ll
  llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
  llvm/test/CodeGen/RISCV/mul.ll
  llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
  llvm/test/CodeGen/RISCV/setcc-logic.ll
  llvm/test/CodeGen/RISCV/split-offsets.ll
  llvm/test/CodeGen/RISCV/vararg.ll

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