[PATCH] D106601: [RISCV] Teach vsetvli insertion pass that it doesn't need to insert vsetvli for unit-stride or strided loads/stores in some cases.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 6 17:54:31 PDT 2021

Previous message: [PATCH] D107603: [RISCV] Fold (add (select lhs, rhs, cc, 0, y), x) -> (select lhs, rhs, cc, x, (add x, y))
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craig.topper added a comment.

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  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D106601/new/

https://reviews.llvm.org/D106601

Previous message: [PATCH] D107603: [RISCV] Fold (add (select lhs, rhs, cc, 0, y), x) -> (select lhs, rhs, cc, x, (add x, y))
Next message: [compiler-rt] 5a2a179 - [profile][Fuchsia] Add missing system header #include
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