[PATCH] D107657: [RISCV][VP] Add support for VP_REDUCE_* operations

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Does TLI.expandVecReduce need any updates?



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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:2055
+// Promote either the vector operand of a VECREDUCE_* or VP_REDUCE_* node, or
+// the start value of a VP_REDUCE node.
+SDValue DAGTypeLegalizer::PromoteIntOp_VEC_VP_REDUCE(SDNode *N, unsigned OpNo) {
----------------
Are we allowing the start value to have a different type than the result? Or should we make them them same and handle start promotion when we handle result promotion. I think that would also mean we need to insert an appropriate extend if promoting the vector forces the result type to be enlarged?


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:628
+
+      setOperationAction(ISD::VP_REDUCE_FADD, VT, Custom);
+      setOperationAction(ISD::VP_REDUCE_SEQ_FADD, VT, Custom);
----------------
Aren't these covered by the FloatingPointVPOps loop?


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https://reviews.llvm.org/D107657