[llvm] 666ee84 - [PowerPC] Fix shift amount of xxsldwi when performing vector int_to_double
Kai Luo via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 5 23:01:34 PDT 2021
Author: Kai Luo
Date: 2021-08-06T06:01:29Z
New Revision: 666ee849f0778160b4660acccb796ac5bd238b2d
URL: https://github.com/llvm/llvm-project/commit/666ee849f0778160b4660acccb796ac5bd238b2d
DIFF: https://github.com/llvm/llvm-project/commit/666ee849f0778160b4660acccb796ac5bd238b2d.diff
LOG: [PowerPC] Fix shift amount of xxsldwi when performing vector int_to_double
POC
```
// main.c
#include <stdio.h>
#include <altivec.h>
extern vector double foo(vector int s);
int main() {
vector int s = {0, 1, 0, 4};
vector double vd;
vd = foo(s);
printf("%lf %lf\n", vd[0], vd[1]);
return 0;
}
// poc.c
vector double foo(vector int s) {
int x1 = s[1];
int x3 = s[3];
double d1 = x1;
double d3 = x3;
vector double x = { d1, d3 };
return x;
}
```
Compiled with `poc.c main.c -mcpu=pwr8 -O3` on BE machine.
Current clang gives
```
4.000000 1.000000
```
while xlc gives
```
1.000000 4.000000
```
Xlc's output should be correct.
Reviewed By: shchenz, #powerpc
Differential Revision: https://reviews.llvm.org/D107428
Added:
Modified:
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/test/CodeGen/PowerPC/build-vector-tests.ll
llvm/test/CodeGen/PowerPC/vec_int_to_double_shuffle.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index a4101a8f656d..0855b0186dab 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -2962,11 +2962,11 @@ def : Pat<(v2i64 (fp_to_uint
def : Pat<WToDPExtractConv.BV02S,
(v2f64 (XVCVSXWDP $A))>;
def : Pat<WToDPExtractConv.BV13S,
- (v2f64 (XVCVSXWDP (XXSLDWI $A, $A, 3)))>;
+ (v2f64 (XVCVSXWDP (XXSLDWI $A, $A, 1)))>;
def : Pat<WToDPExtractConv.BV02U,
(v2f64 (XVCVUXWDP $A))>;
def : Pat<WToDPExtractConv.BV13U,
- (v2f64 (XVCVUXWDP (XXSLDWI $A, $A, 3)))>;
+ (v2f64 (XVCVUXWDP (XXSLDWI $A, $A, 1)))>;
def : Pat<(v2f64 (insertelt v2f64:$A, f64:$B, 0)),
(v2f64 (XXPERMDI (SUBREG_TO_REG (i64 1), $B, sub_64), $A, 1))>;
def : Pat<(v2f64 (insertelt v2f64:$A, f64:$B, 1)),
diff --git a/llvm/test/CodeGen/PowerPC/build-vector-tests.ll b/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
index 4bc1a9461d25..edf42bf4a9b0 100644
--- a/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
+++ b/llvm/test/CodeGen/PowerPC/build-vector-tests.ll
@@ -6160,7 +6160,7 @@ entry:
define dso_local <2 x double> @sint_to_fp_widen13(<4 x i32> %a) {
; P9BE-LABEL: sint_to_fp_widen13:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: xxsldwi vs0, v2, v2, 3
+; P9BE-NEXT: xxsldwi vs0, v2, v2, 1
; P9BE-NEXT: xvcvsxwdp v2, vs0
; P9BE-NEXT: blr
;
@@ -6171,7 +6171,7 @@ define dso_local <2 x double> @sint_to_fp_widen13(<4 x i32> %a) {
;
; P8BE-LABEL: sint_to_fp_widen13:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: xxsldwi vs0, v2, v2, 3
+; P8BE-NEXT: xxsldwi vs0, v2, v2, 1
; P8BE-NEXT: xvcvsxwdp v2, vs0
; P8BE-NEXT: blr
;
@@ -6224,7 +6224,7 @@ entry:
define dso_local <2 x double> @uint_to_fp_widen13(<4 x i32> %a) {
; P9BE-LABEL: uint_to_fp_widen13:
; P9BE: # %bb.0: # %entry
-; P9BE-NEXT: xxsldwi vs0, v2, v2, 3
+; P9BE-NEXT: xxsldwi vs0, v2, v2, 1
; P9BE-NEXT: xvcvuxwdp v2, vs0
; P9BE-NEXT: blr
;
@@ -6235,7 +6235,7 @@ define dso_local <2 x double> @uint_to_fp_widen13(<4 x i32> %a) {
;
; P8BE-LABEL: uint_to_fp_widen13:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: xxsldwi vs0, v2, v2, 3
+; P8BE-NEXT: xxsldwi vs0, v2, v2, 1
; P8BE-NEXT: xvcvuxwdp v2, vs0
; P8BE-NEXT: blr
;
diff --git a/llvm/test/CodeGen/PowerPC/vec_int_to_double_shuffle.ll b/llvm/test/CodeGen/PowerPC/vec_int_to_double_shuffle.ll
index c92a26e8ad95..9bba60435c62 100644
--- a/llvm/test/CodeGen/PowerPC/vec_int_to_double_shuffle.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_int_to_double_shuffle.ll
@@ -12,7 +12,7 @@ define <2 x double> @foo(<4 x i32> %s) {
;
; CHECK-BE-LABEL: foo:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: xxsldwi 0, 34, 34, 3
+; CHECK-BE-NEXT: xxsldwi 0, 34, 34, 1
; CHECK-BE-NEXT: xvcvsxwdp 34, 0
; CHECK-BE-NEXT: blr
entry:
@@ -29,7 +29,7 @@ define <2 x double> @bar(<4 x i32> %s) {
;
; CHECK-BE-LABEL: bar:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: xxsldwi 0, 34, 34, 3
+; CHECK-BE-NEXT: xxsldwi 0, 34, 34, 1
; CHECK-BE-NEXT: xvcvuxwdp 34, 0
; CHECK-BE-NEXT: blr
entry:
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