[PATCH] D107602: [AMDGPU] Improve v2i32/v2f32 insertelt patterns

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

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Using REG_SEQUENCE produces better code than INSERT_SUBREG,
we can omit one move instruction in many cases.

Fixes: SWDEV-298028


https://reviews.llvm.org/D107602

Files:
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll

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