[PATCH] D107507: [amdgpu] Revise the conversion from i64 to f32.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 5 06:50:52 PDT 2021
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2498
+ // 33 sign bits; otherwise, maximally 32. That is,
+ // MaxShAmt = 32 + ((Lo ^ Hi) >> 31)
+ SDValue HasSameSign = DAG.getNode(
----------------
The comment says 33 if Hi and Lo have the same sign, but the expression gives 33 if they have different sign. Do you want `33 - ((Lo ^ Hi) >> 31)`?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107507/new/
https://reviews.llvm.org/D107507
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