[PATCH] D106471: [DAGCombiner][RISCV][AMDGPU] Call SimplifyDemandedBits at the end of visitMULHU to enable known bits contant folding.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM - cheers



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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:4582
+  // We don't have demanded bits support for MULHU so this just enables constant
+  // folding based on known bits.
+  if (SimplifyDemandedBits(SDValue(N, 0)))
----------------
craig.topper wrote:
> RKSimon wrote:
> > Out of interest, do we need MULHU support in SimplifyDemandedBits?
> I'm not sure there's much you can do. If you demand any of the bits from MULHU, then I think you demand all bits of the input. Maybe there's something you can do if you have known bits from one input, but I'd need to think about it a lot more.
Since a common reason for creating these nodes is divide by constants (TargetLowering.BuildUDIV et al) then RHS is likely to be constant - but yes this should probably wait until we have some actual examples.


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