[PATCH] D107478: [SelectionDAG] Correctly determine the VECREDUCE_SEQ_FMUL action

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck updated this revision to Diff 364375.
frasercrmck added a comment.

- rebase to give the buildbots a go


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107478/new/

https://reviews.llvm.org/D107478

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1181,6 +1181,7 @@
         Node->getOpcode(), Node->getOperand(0).getValueType());
     break;
   case ISD::VECREDUCE_SEQ_FADD:
+  case ISD::VECREDUCE_SEQ_FMUL:
     Action = TLI.getOperationAction(
         Node->getOpcode(), Node->getOperand(1).getValueType());
     break;


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