[PATCH] D107495: [hwasan] barrier after tagging and before tag check.
Florian Mayer via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 4 12:24:57 PDT 2021
fmayer created this revision.
Herald added subscribers: jfb, hiraditya.
fmayer added a reviewer: hctim.
fmayer published this revision for review.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
this makes sure that the memory accesses and the tagging are not reordered,
which happens in practice when building android.
without this change, building android with use-after-scope makes it
crashloop, with this it works.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D107495
Files:
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Index: llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
===================================================================
--- llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+++ llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
@@ -985,6 +985,7 @@
return false; // FIXME
IRBuilder<> IRB(O.getInsn());
+ IRB.CreateFence(AtomicOrdering::Acquire, SyncScope::SingleThread);
if (isPowerOf2_64(O.TypeSize) &&
(O.TypeSize / 8 <= (1ULL << (kNumberOfAccessSizes - 1))) &&
(!O.Alignment || *O.Alignment >= (1ULL << Mapping.Scale) ||
@@ -1048,6 +1049,7 @@
Int8Ty, IRB.CreateBitCast(AI, Int8PtrTy),
AlignedSize - 1));
}
+ IRB.CreateFence(AtomicOrdering::Release, SyncScope::SingleThread);
}
}
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