[PATCH] D107486: [DAGCombiner][AMDGPU] Canonicalize constants to the RHS of MULHU/MULHS.

[Jay Foad via Phabricator via llvm-commits]

foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.

LGTM, thanks!



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Comment at: llvm/test/CodeGen/AMDGPU/sdiv64.ll:1211
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v2, v3, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, 0, v0
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
----------------
Looks like there is some further cleanup possible here. This instruction is "add 0 with carry out" which is pretty useless.


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  https://reviews.llvm.org/D107486/new/

https://reviews.llvm.org/D107486