[llvm] 5643736 - [AArch64][GlobalISel] Widen G_SELECT before clamping it

[Jessica Paquette via llvm-commits]

Author: Jessica Paquette
Date: 2021-08-03T18:31:17-07:00
New Revision: 564373637832b3ac2a4434c45f58c066c08e9b8c

URL: https://github.com/llvm/llvm-project/commit/564373637832b3ac2a4434c45f58c066c08e9b8c
DIFF: https://github.com/llvm/llvm-project/commit/564373637832b3ac2a4434c45f58c066c08e9b8c.diff

LOG: [AArch64][GlobalISel] Widen G_SELECT before clamping it

This allows us to handle the s88 G_SELECTS:

https://godbolt.org/z/5s18M4erY

Weird types like this can result in weird merges.

Widening to s128 first and then clamping down avoids that situation.

Differential Revision: https://reviews.llvm.org/D107415

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 4632082262e3f..2bd3889fe6022 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -477,8 +477,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
 
   getActionDefinitionsBuilder(G_SELECT)
       .legalFor({{s32, s1}, {s64, s1}, {p0, s1}})
-      .clampScalar(0, s32, s64)
       .widenScalarToNextPow2(0)
+      .clampScalar(0, s32, s64)
       .minScalarEltSameAsIf(all(isVector(0), isVector(1)), 1, 0)
       .lowerIf(isVector(0));
 

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
index 5186dbfa7b4ab..2c6ce9b5618f0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir
@@ -158,3 +158,29 @@ body:             |
     RET_ReallyLR implicit $q0
 
 ...
+---
+name:            s88
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $w0, $w1, $x0
+
+    ; CHECK-LABEL: name: s88
+    ; CHECK: liveins: $w0, $w1, $x0
+    ; CHECK: %a:_(s32) = COPY $w0
+    ; CHECK: %b:_(s32) = COPY $w1
+    ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), %a(s32), %b
+    ; CHECK: %cmp:_(s1) = G_TRUNC [[ICMP]](s32)
+    ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+    ; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT %cmp(s1), [[DEF]], [[DEF]]
+    ; CHECK: $x0 = COPY [[SELECT]](s64)
+    ; CHECK: RET_ReallyLR implicit $x0
+    %a:_(s32) = COPY $w0
+    %b:_(s32) = COPY $w1
+    %cmp:_(s1) = G_ICMP intpred(sgt), %a(s32), %b
+    %sel_a:_(s88) = G_IMPLICIT_DEF
+    %sel_b:_(s88) = G_IMPLICIT_DEF
+    %select:_(s88) = G_SELECT %cmp(s1), %sel_a, %sel_b
+    %trunc:_(s64) = G_TRUNC %select
+    $x0 = COPY %trunc
+    RET_ReallyLR implicit $x0