[PATCH] D107408: [DAGCombiner][TLI] SimplifySetCC(): `(X&1) != 0`-->`extortrunc(X&1)` (PR51312)

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: spatel, craig.topper, RKSimon.
lebedev.ri added a project: LLVM.
Herald added subscribers: pengfei, hiraditya.
lebedev.ri requested review of this revision.

If we take and produce non-i1 type, and the input has only the 0'th bit,
and we are only checking whether the input is not empty,
then just use the casted operand, iff the boolean type does not require sign-extension.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D107408

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/X86/lzcnt-cmp.ll
  llvm/test/CodeGen/X86/parity-vec.ll
  llvm/test/CodeGen/X86/umul_fix_sat.ll

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