[PATCH] D107367: [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322)

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb created this revision.
andreadb added reviewers: RKSimon, craig.topper, lebedev.ri.
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This fixes a bug where implicit uses of EFLAGS were not marked as ReadAdvance in the RM/MR variants of ADC/SBB (PR51318).

This also fixes the absence of ReadAdvance for the register operand of RMW arithmetic instructions (PR51322).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D107367

Files:
  llvm/lib/Target/X86/X86InstrArithmetic.td
  llvm/test/tools/llvm-mca/X86/BtVer2/adc-sequence-readadvance.s
  llvm/test/tools/llvm-mca/X86/BtVer2/rmw-adc-sequence-readadvance.s
  llvm/test/tools/llvm-mca/X86/BtVer2/rmw-add-sequence-readadvance.s

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