[PATCH] D98002: [RISCV] Add scheduling resources for V

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 3 01:47:03 PDT 2021


frasercrmck accepted this revision.
frasercrmck added a comment.
This revision is now accepted and ready to land.

I'll formally LGTM given people seem happy overall.



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:593
+  def _VS : VALUVV<funct6, OPMVV, opcodestr # ".vs">,
+            Sched<[WriteVIRedV, ReadVIRedV, ReadVIRedV, ReadVMask]>;
+}
----------------
evandro wrote:
> frasercrmck wrote:
> > I dunno if the first source of a reduction is likely to benefit from a different scheduling type than the second, since it's only reading the first element?
> I don't know either.  It would probably be used with `ReadAdvance`.  
Yeah possibly. We can cross that bridge when we come to it, I think.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98002/new/

https://reviews.llvm.org/D98002



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