[PATCH] D107091: [Lanai] implement wide immediate support

[Serge Bazanski via Phabricator via llvm-commits]

q3k added inline comments.


================
Comment at: llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h:63
+    if (BitSize > 64)
+      return TTI::TCC_Free;
+
----------------
jpienaar wrote:
> Wouldn't this say that returning > 64 is cheaper than returning 32 bits?
//As far as I understand//, this affects only constant hoisting, and returning `TCC_Free` means “don't hoist this constant”, which is the default behavior unless implemented otherwise anyway. IIUC, this means worst case we're leaving possible optimizations for i128+ on the table but aren't making things worse for narrower types. There is also precedent to returning _Free when deilng with wide immediates in `SystemZTTIImpl::getIntImmCost`, which is in fact where I've lifted this from. :) Same for `X86TTIImpl::getIntImmCost`.  

However, I can instead attempt to properly implement the cost here. As far as I understand, we want to return the cost of materializing loading the constant as an immediate, a.k.a. the number of instructions it takes to load a given constant into registers. For anything wider than 32 bit we could implement the line 71-74 calculation in a loop for each 32-bit chunk of the immediate. This is what RISC-V and AArch64 do.

Alternatively we could simplify it to `(BitSize >> 3) * TTC_Basic` (8 for i128, 16 for i256...), reflecting the worst case mov+or materialization for each 32 bits, ignoring the no-low-bits set optimization from lines 72-73.  This is in line with `4 * TTC_Basic` currently returned for i64.

WDYT?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107091/new/

https://reviews.llvm.org/D107091