[PATCH] D107068: [DAG] DAGCombiner::visitVECTOR_SHUFFLE - recognise INSERT_SUBVECTOR patterns.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 2 09:14:14 PDT 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:21342
+          if (0 <= RHSStartIdx && i == (NumSubElts - 1))
+            return DAG.getNode(ISD::INSERT_SUBVECTOR, SDLoc(N), VT, LHS,
+                               RHS.getOperand(RHSStartIdx / NumSubElts),
----------------
Why can't this be after the loop and all of the breaks replaced with return SDValue()?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107068/new/

https://reviews.llvm.org/D107068



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