[PATCH] D107223: [VPlan] Use defined and ops VPValues to print VPInterleaveRecipe.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 363486.
fhahn added a comment.

Replace isStore with getNumStoreOperands as suggested by Ayal, thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107223/new/

https://reviews.llvm.org/D107223

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/lib/Transforms/Vectorize/VPlan.h
  llvm/test/Transforms/LoopVectorize/vplan-printing.ll


Index: llvm/test/Transforms/LoopVectorize/vplan-printing.ll
===================================================================
--- llvm/test/Transforms/LoopVectorize/vplan-printing.ll
+++ llvm/test/Transforms/LoopVectorize/vplan-printing.ll
@@ -175,9 +175,9 @@
 ; CHECK-NEXT:   WIDEN-INDUCTION %iv = phi 0, %iv.next
 ; CHECK-NEXT:   CLONE ir<%gep.AB.0> = getelementptr ir<@AB>, ir<0>, ir<%iv>
 ; CHECK-NEXT:   INTERLEAVE-GROUP with factor 4 at %AB.0, ir<%gep.AB.0>
-; CHECK-NEXT:     %AB.0 = load %gep.AB.0 0
-; CHECK-NEXT:     %AB.1 = load %gep.AB.1 1
-; CHECK-NEXT:     %AB.3 = load %gep.AB.3 3
+; CHECK-NEXT:     ir<%AB.0> = load from index 0
+; CHECK-NEXT:     ir<%AB.1> = load from index 1
+; CHECK-NEXT:     ir<%AB.3> = load from index 3
 ; CHECK-NEXT:   CLONE ir<%iv.plus.1> = add ir<%iv>, ir<1>
 ; CHECK-NEXT:   CLONE ir<%gep.AB.1> = getelementptr ir<@AB>, ir<0>, ir<%iv.plus.1>
 ; CHECK-NEXT:   CLONE ir<%iv.plus.2> = add ir<%iv>, ir<2>
@@ -189,10 +189,10 @@
 ; CHECK-NEXT:   CLONE ir<%gep.CD.2> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.2>
 ; CHECK-NEXT:   CLONE ir<%gep.CD.3> = getelementptr ir<@CD>, ir<0>, ir<%iv.plus.3>
 ; CHECK-NEXT:   INTERLEAVE-GROUP with factor 4 at <badref>, ir<%gep.CD.3>
-; CHECK-NEXT:     store %add, %gep.CD.0 0
-; CHECK-NEXT:     store 1, %gep.CD.1 1
-; CHECK-NEXT:     store 2, %gep.CD.2 2
-; CHECK-NEXT:     store %AB.3, %gep.CD.3 3
+; CHECK-NEXT:     store ir<%add> to index 0
+; CHECK-NEXT:     store ir<1> to index 1
+; CHECK-NEXT:     store ir<2> to index 2
+; CHECK-NEXT:     store ir<%AB.3> to index 3
 ; CHECK-NEXT: No successors
 ; CHECK-NEXT: }
 ;
Index: llvm/lib/Transforms/Vectorize/VPlan.h
===================================================================
--- llvm/lib/Transforms/Vectorize/VPlan.h
+++ llvm/lib/Transforms/Vectorize/VPlan.h
@@ -1312,7 +1312,7 @@
     // The first operand is the address, followed by the stored values, followed
     // by an optional mask.
     return ArrayRef<VPValue *>(op_begin(), getNumOperands())
-        .slice(1, getNumOperands() - (HasMask ? 2 : 1));
+        .slice(1, getNumStoreOperands());
   }
 
   /// Generate the wide load or store, and shuffles.
@@ -1325,6 +1325,12 @@
 #endif
 
   const InterleaveGroup<Instruction> *getInterleaveGroup() { return IG; }
+
+  /// Returns the number of stored operands of this interleave group. Returns 0
+  /// for load interleave groups.
+  unsigned getNumStoreOperands() const {
+    return getNumOperands() - (HasMask ? 2 : 1);
+  }
 };
 
 /// A recipe to represent inloop reduction operations, performing a reduction on
Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -9547,9 +9547,22 @@
     O << ", ";
     Mask->printAsOperand(O, SlotTracker);
   }
-  for (unsigned i = 0; i < IG->getFactor(); ++i)
-    if (Instruction *I = IG->getMember(i))
-      O << "\n" << Indent << "  " << VPlanIngredient(I) << " " << i;
+
+  unsigned OpIdx = 0;
+  for (unsigned i = 0; i < IG->getFactor(); ++i) {
+    if (!IG->getMember(i))
+      continue;
+    if (getNumStoreOperands() > 0) {
+      O << "\n" << Indent << "  store ";
+      getOperand(1 + OpIdx)->printAsOperand(O, SlotTracker);
+      O << " to index " << i;
+    } else {
+      O << "\n" << Indent << "  ";
+      getVPValue(OpIdx)->printAsOperand(O, SlotTracker);
+      O << " = load from index " << i;
+    }
+    ++OpIdx;
+  }
 }
 #endif
 


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