[PATCH] D107278: [RISCV] Add new lga pseudoinstruction

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 created this revision.
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This mirrors lla and is always GOT-relative, allowing an explicit
request to use the GOT without having to expand the instruction. This
then means la is just defined in terms of lla and lga, based on whether
PIC is enabled.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D107278

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/test/MC/RISCV/rvi-pseudos-invalid.s
  llvm/test/MC/RISCV/rvi-pseudos.s

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