[PATCH] D107250: [JITLink] Improve extractBits function
luxufan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 2 00:48:04 PDT 2021
StephenFan updated this revision to Diff 363389.
StephenFan added a comment.
Change size_t to unsigned
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D107250/new/
https://reviews.llvm.org/D107250
Files:
llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
Index: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
===================================================================
--- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
+++ llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
@@ -57,8 +57,8 @@
"No HI20 PCREL relocation type be found for LO12 PCREL relocation type");
}
-static uint32_t extractBits(uint64_t Num, unsigned High, unsigned Low) {
- return (Num & ((1ULL << (High + 1)) - 1)) >> Low;
+static uint32_t extractBits(uint32_t Num, unsigned Low, unsigned Size) {
+ return (Num & (((1ULL << (Size + 1)) - 1) << Low)) >> Low;
}
class ELFJITLinker_riscv : public JITLinker<ELFJITLinker_riscv> {
@@ -128,8 +128,8 @@
int64_t Value = RelHI20->getTarget().getAddress() +
RelHI20->getAddend() - E.getTarget().getAddress();
int64_t Lo = Value & 0xFFF;
- uint32_t Imm31_25 = extractBits(Lo, 11, 5) << 25;
- uint32_t Imm11_7 = extractBits(Lo, 4, 0) << 7;
+ uint32_t Imm31_25 = extractBits(Lo, 5, 7) << 25;
+ uint32_t Imm11_7 = extractBits(Lo, 0, 5) << 7;
uint32_t RawInstr = *(little32_t *)FixupPtr;
*(little32_t *)FixupPtr = (RawInstr & 0x1FFF07F) | Imm31_25 | Imm11_7;
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