[PATCH] D88994: Fix the default alignment of i1 vectors.

[Eli Friedman via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGbdd55b2f1810: Fix the default alignment of i1 vectors. (authored by efriedma).
Herald added subscribers: cfe-commits, ctetreau, kbarton, nemanjai.
Herald added a project: clang.

Changed prior to commit:
  https://reviews.llvm.org/D88994?vs=360901&id=363320#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88994/new/

https://reviews.llvm.org/D88994

Files:
  clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-call.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
  clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
  clang/test/CodeGen/builtins-ppc-pair-mma.c
  llvm/lib/IR/DataLayout.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
  llvm/test/CodeGen/AArch64/spillfill-sve.ll
  llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
  llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
  llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
  llvm/test/CodeGen/NVPTX/param-load-store.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
  llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
  llvm/test/CodeGen/Thumb2/mve-masked-load.ll
  llvm/test/CodeGen/Thumb2/mve-masked-store.ll
  llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll
  llvm/test/CodeGen/X86/avx512-extract-subvector-load-store.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/avx512-select.ll
  llvm/test/CodeGen/X86/bitcast-vector-bool.ll
  llvm/test/CodeGen/X86/load-local-v3i129.ll
  llvm/test/CodeGen/X86/pr41619.ll
  llvm/test/CodeGen/X86/vector-sext.ll
  llvm/test/Transforms/InstCombine/abs-intrinsic.ll
  llvm/test/Transforms/InstCombine/icmp-vec.ll
  llvm/test/Transforms/InstCombine/select-min-max.ll
  llvm/test/Transforms/InstCombine/shufflevec-bitcast.ll
  llvm/test/Transforms/SROA/vector-promotion-different-size.ll
  llvm/test/Transforms/VectorCombine/load-insert-store.ll

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