[PATCH] D106891: [AMDGPU] [Remarks] Emit optimization remarks when an FP atomic instruction is converted into a CAS loop or unsafe hardware instruction for GFX90A
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 30 09:03:51 PDT 2021
arsenm added a comment.
Needs an IR only test too
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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:12086
+ TargetLowering::AtomicExpansionKind Kind, bool UnsafeFlag) {
+ ORE = new OptimizationRemarkEmitter(RMW->getFunction());
+ if (Kind == TargetLowering::AtomicExpansionKind::CmpXChg) {
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This is supposed to come from the pass, I don't think you can materialize this out of nowhere
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D106891/new/
https://reviews.llvm.org/D106891
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