[PATCH] D107139: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.

Hsiangkai Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 31 15:01:14 PDT 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rG8b33839f010f: [RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR. (authored by HsiangKai).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D107139/new/

https://reviews.llvm.org/D107139

Files:
  clang/lib/Basic/Targets/RISCV.cpp
  clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/inline-asm.ll

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